It would probably be interesting to spend a little time seeing
how integrated circuits are made. This chapter will be long on
description, and rather short on equations (yay!). This is not
to say that there is not a lot of analytical work in the IC
fabrication process. It's just that things get very
complicated in a hurry, and so we probably are better
off just looking at most processes from a qualitative point of
view.
Let's start out by taking a look at the state of the industry,
and remark on a few trends.
Figure 1 is a plot of
IC sales in the United States over the past 30 years. This might
not be a bad field to get into! Maybe there will be a job or two
out there when you are ready to graduate.
There has been a steady shift away from bipolar technology to
MOS as is shown in
Figure 2. Currently, about 90%
of the market is composed of MOS devices, and only about 10% of
bipolar. This is likely to be the case for some time to
come. The change in slope, where MOS starts taking over from
bipolar at a more rapid rate about 1987 is when CMOS technology
really started to come into heavy use. At that point, bipolar
TTL logic essentially faded to zero.
As you probably are aware, devices have been getting smaller and
smaller, and chips have been getting bigger and bigger with
time. A most
impressive plot is one
which shows the number of components/chip as a function of time.
One of the main drivers for this has been feature size, which
shows the same nearly exponential behavior as
components/chip. This is plotted in
Figure 4 for
your education. What is interesting to note about this is that
certain "doom sayers" have been predicting an abrupt halt to
this curve for some time now. It stands to reason that you can
not image something which is finer than
λλ, the wavelength of the
light you use to project it with. However, by going to the
ultraviolet, and using a variety of image enhancing techniques,
lithographic engineers continue to be able to make finer and
finer structures.
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