Summary: You will implement and optimize for execution time a quadrature phase-shift keying (QPSK) digital transmitter and pseudo-noise (PN) sequence generator.
Note: Your browser may not currently support MathML. See our browser support page for additional details. You can always view the correct math in the PDF version.
You will implement the complete system shown in Digital Transmitter: Introduction to Quadrature Phase-Shift Keying. Then you will optimize the system for execution time. The optimization process will probably be much easier if you plan for optimization before you begin any programming.
Once you have planned your program strategy, implement the PN generator from Digital Transmitter: Introduction to Quadrature Phase-Shift Keying and verify that it is working. You may wish to refer to the description of assembly instructions for logical operations in Section 2-2 of the Mnemonic Instruction Set [link] reference. Initialize the shift register to one.
For your transmitter implementation, use the signal
constellation shown in Digital Transmitter: Introduction to
Quadrature Phase-Shift Keying, a digital carrier
frequency
Viewing the transmitted signal on the oscilloscope may help
you determine whether your code works properly, but you
should check it more carefully by setting breakpoints in
Code Composer and using the Memory option from
the View menu to view the contents of memory.
A vector signal analyzer (VSA)
provides another method of testing, which is described in
Vector Signal Analyzer: Testing a
QPSK Transmitter.
One objective of this exercise is to teach optimization and
efficient code techniques. For this reason, your performance
will be judged primarily on the total execution time of your
system. Note that by execution time we mean cycle count,
not the number of instructions in your program. Remember
that several of the TI TMS320C54xx instructions take more
than one cycle. The multicycle instructions are primarily
the multi-word instructions, including instructions that
take immediates, like stm, and instructions
using direct addressing of memory (such as ld
*(temp),A). Branch and repeat statements also
require several cycles to execute. The Mnemonic
Instruction Set [link] reference will tell you how many
cycles required for each instruction; make sure you look at
the cycle count for the syntax you are using. It is also
possible to use the debugger to determine the number of
cycles used by your code.
You will be graded based on the number of cycles used
between the return from one WAITDATA call and
the arrival at the next WAITDATA call. If the
number of cycles between one WAITDATA and the
next is variable, the maximum possible number of cycles will
be used. You must use the core.asm
file as provided; this file may not be modified. You
explicitly may not change the number of samples read and
written by each WAITDATA call! We reserve the
right to test your code by substituting the test
vector core file.