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Integrated Circuit Manufacturing: Bird's Eye View

Module by: Bill Wilson

Summary: This document provides a bird's eye view of Integrated Circuit manufacturing. It steps through the process of manufacturing an IC, from the n-tank to patterning the metallization.

It will no doubt be helpful if we also take a plane or "bird's eye" view of what this circuit looks like as well. There are, in fact, some interesting things we can gain by looking at some of them.

We have been looking at the development of the circuit from a cross-sectional point of view, watching the formation of the various levels which make up the finished CMOS inverter. This is, in fact, not the way a circuit designer looks at things. A circuit designer sees things from above, and only worries about the placement of transistors, and how they will be connected together. In fact, the only factor in the actual design of the layout engineer has any choice on is the transistor width, W. All other parameters are decided upon beforehand by the process engineer. So what does the layout engineer see? We start with the n- implant to make the n-tank, as shown in Figure 1. (You should go back and follow along with the cross-sectional views of the process, as we review looking at things from the top.)

Figure 1
Implanted n-Tank
Implanted n-Tank (5.37.png)
A mask opposite to that of the n-tank allows us to an n-channel V T V T adjust. We next deposit and pattern the nitride for the active regions, and grow the field oxide (FOX) Figure 2.
Figure 2
Growing FOX
Growing FOX (5.38.png)
We remove the nitride, and deposit and pattern the poly., as seen in Figure 3
Figure 3
Gate Poly Pattern
Gate Poly Pattern (5.39.png)
Figure 4 shows what the two masks look like for the n+ and p+ source/drain implants:
Figure 4
S/D Implants
S/D Implants (5.40.png)
Note that the gate poly extends beyond where the implant is being performed (inside the dotted line). This is a design rule which is the way the circuit designer takes into account the fact that the manufacturing process must have some tolerance built in, because things will not always be lined up just perfectly. Now we make some contact holes, seen in Figure 5:
Figure 5
Etching Contact Holes
Etching Contact Holes (5.41.png)
And finally, we sputter and pattern the metallization, which is depicted in Figure 6. You should go back to MOSFETs, and convince yourself that the circuit shown in Figure 1 is indeed what has been constructed in Figure 6. See if you can identify all of the correct parts. Note that there is a connection between V ss V ss (ground) and the p-substrate very close to the n-channel source. There is also a contact between the n-moat and V dd V dd which is very close to the p-channel source. What advantage would this have? Hint: review the discussion of latch-up.
Figure 6
Metallization Patterning
Metallization Patterning (5.42.png)

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