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<document xmlns="http://cnx.rice.edu/cnxml" xmlns:md="http://cnx.rice.edu/mdml/0.4" xmlns:m="http://www.w3.org/1998/Math/MathML" xmlns:bib="http://bibtexml.sf.net/" id="new54">
  <name>Yield</name>
  <metadata>
  <md:version>**new**</md:version>
  <md:created>2003/06/20 13:23:11.218 GMT-5</md:created>
  <md:revised>2003/06/20 13:34:07.843 GMT-5</md:revised>
  <md:authorlist>
    <md:author id="wlw">
      <md:firstname>Bill</md:firstname>
      
      <md:surname>Wilson</md:surname>
      <md:email>wlw@rice.edu</md:email>
    </md:author>
  </md:authorlist>

  <md:maintainerlist>
    <md:maintainer id="wlw">
      <md:firstname>Bill</md:firstname>
      
      <md:surname>Wilson</md:surname>
      <md:email>wlw@rice.edu</md:email>
    </md:maintainer>
    <md:maintainer id="lizzardg">
      <md:firstname>Elizabeth</md:firstname>
      
      <md:surname>Gregory</md:surname>
      <md:email>lizzardg@rice.edu</md:email>
    </md:maintainer>
    <md:maintainer id="jsilv">
      <md:firstname>Jeffrey</md:firstname>
      
      <md:surname>Silverman</md:surname>
      <md:email>jsilv@rice.edu</md:email>
    </md:maintainer>
  </md:maintainerlist>
  
  <md:keywordlist>
    <md:keyword>integrated circuits</md:keyword>
    <md:keyword>yield</md:keyword>
    <md:keyword>reliability</md:keyword>
  </md:keywordlist>

  <md:abstract>This document covers yield of integrated circuit production.</md:abstract>
</metadata>

  <content>
    <para id="p1">Perhaps a word about feature size, chip size and
      yield would be in order. We saw earlier that circuits are
      repeated many times across a wafer's surface during the
      photolithographic stage. Although great care is exercised in
      trying to prevent defects from becoming part of a wafer surface
      (clean rooms, "bunny" suits, ultra-pure chemicals etc.) each
      wafer that goes through a fab will end up with
      <emphasis>some</emphasis> "killer" defects distributed across
      the wafer surface <cnxn target="fig1"/>.

      <figure id="fig1">
	<name>A Wafer with Defects</name>
	<media type="image/png" src="5.45.png"/>
      </figure>

      Imagine that we try to manufacture some chips of a certain
      size. A glance at <cnxn target="fig2"/> shows that we would have
      15 of 21 good chips, for a yield of about 71%. Suppose we could,
      through improved technology, perform a 30% "shrink" on the
      circuit - <foreign>i.e.</foreign> make its dimensions 30%
      smaller. Now, as <cnxn target="fig3"/> shows, we get 40 good
      chips/wafer instead of 15 (and they cost no more to produce) and
      our yield has gone to 40 out of 46 or 87%. We will be rich! Or
      at least we won't go out of business!
      
      <figure id="fig2">
	<name>Six Killed Circuits</name>
	<media type="image/png" src="5.46.png"/>
      </figure>

      <figure id="fig3">
	<name>Lots More Good Ones</name>
	<media type="image/png" src="5.47.png"/>
      </figure>

      Yield, reliability and manufacturability are all critical issues
      in the semiconductor industry. The business is highly
      competitive, and the technology keeps moving rapidly. It is an
      exciting and challenging field, one which demands the very best,
      but which rewards someone who is willing to never stop thinking
      and to bring forth the very best creative solutions to hard
      problems.
    </para>
  </content>
  
</document>
