Objective

In this lab, you will learn how to set up Spectrum Digital’s eZdsp™ F2812 to implement a finite impulse response (FIR) filter using an audio input. Since the F2812 does not have a digital-to-analog converter (DAC) as one of its peripherals, you will be using an audio processing daughtercard that features Texas Instruments’ (TI) TLV5638 DAC.

FIR Filtering Theory

Before you begin, review the basics of digital filtering.

Introduction to the eZdsp™ F2812

The eZdsp™ F2812 allows people to determine if the TI TMS320F2812 digital signal processor (DSP) is suitable for their application requirements. It also allows evaluators to develop and run software for the F2812 processor by using Code Composer Studio. A separate tutorial for the Code Composer Studio software is available in this course.

The eZdsp™ F2812 has the following features:

Figure 1

eZdsp™ F2812 Block Diagram from Spectrum Digital's Datasheet

Setting Up Hardware

To begin this lab, there are a couple of tasks you need to do in order to set up your hardware before programming the DSP. The eZdsp™ requires a 5V power supply that is provided and should be connected to the board via connector P6. The supplied parallel cable also needs to be plugged into a lab PC.

Attach the audio processing daughtercard to the eZdsp™ board as shown in the following pictures:

Figure 2

(a) Side View of the Mounted Boards (b) Audio Daughtercard Mounted on the eZdsp

Connect the power supply and parallel cable to the eZdsp™. The LED labeled Power on the daughtercard should light up bright orange.

Connect the provided speakers to the jumpers labeled R_SPKR and L_SPKR on the daughtercard. Make sure the black wire of each speaker is connected to the ‘-‘ and the red wire is connected to the ‘+’.

For the lab, you will be using an Apple iPod to supply the audio source. Connect the supplied cable to the jumper labeled J4 on the daughtercard. Since the iPod you are using does not have a reliable battery, make sure the iPod is connected to a power supply.

Your setup should look like this:

Figure 3: Total Hardware Setup

To turn the iPod on, press the Play button. To turn it off, hold the Play button until the screen goes blank, just like in the above picture.

Software Implementation

Please read how to set up the F2812 to run Code Composer Studio.

After you have the filter coefficients, take the two’s complement by using twocomplement.m. You need them in that format in order to use them in the A/D-D/A conversion. Make sure you divide the coefficients by two before taking the two’s complement. To include them in your file, use the save_coeff.m function to create an assembly file.

Serial Peripheral Interface (SPI)

The serial peripheral interface (SPI) is a high-speed synchronous serial input/output (I/O) port that allows a serial bit stream of programmed length (1-16 bits) to be shifted into and out of the device at a programmed bit-transfer rate. The SPI is normally used for communications between the DSP controller and external peripherals, the DAC in our case, or another controller.

Analog-to-Digital Converter (ADC)

The F2812 DSP has a 12-bit ADC core with built-in dual sample-and-hold (S/H). Its options include:

A block diagram of the ADC module from TI documents:

Figure 4: Texas Instruments' ADC Block Diagram

Event Manager A (EVA)

The event manager peripheral in the DSP includes general-purpose (GP) timers, full-compare/PWM units, capture units, and quadrature-encoder pulse (QEP) circuits. You will use event manager A (EVA) to trigger the SOC sequence in the ADC.

EVA functional diagram from TI documents:

Figure 5: Texas Instruments' EVA Functional Overview

Interrupts

Interrupts, as described by Dr. Choi in one of his lab manuals in ELEC 434, provide a mechanism for handling any infrequent or exception event. The interrupt causes a CPU to make a temporary transfer of control from its current location to another location that services the event. Variety of sources, internal and external to the CPU, can generate interrupts. The use of interrupts greatly increases the performance of the CPU by allowing the I/O devices direct and rapid access to the CPU and by freeing the CPU from the task of continually testing the status of its I/O devices. The I/O devices assert interrupts to request the CPU to start a new I/O operation, to signal the completion of an I/O operation, and to signal the occurrence of hardware and software errors.

The F2812 DSP supports one nonmaskable interrupt (NMI) and 16 maskable prioritized interrupt requests (INT1-INT14, RTOSINT, and DLOGINT) at the CPU level.