Unlike the ADC on the MSP, the DACs have variable bit precision of either 8 or 12 bits. The range is also controllable as either one or three times the voltage reference. The voltage reference is also selectable. All bits for controlling voltage reference, scaling, and precision can be found in the DAC12 Control Register (DAC12_xCTL). In most cases, 12 bit precision is desirable.

In the MSP430 architecture there are two general sources for a voltage reference: VeRef and Vref. VeRef is an externally supplied voltage, but Vref is generated by the MSP itself. Because the 226 board does not provide the MSP with a VeRef voltage, the only voltage reference available for the DAC and ADC is the Vref. This restricts the choices for the SREF bits of the DAC control register to the Vref choice. Additionally, the Vref voltage reference for the DAC comes from the ADC module. This means that it is necessary to turn on the voltage reference in the ADC control register (ADC12CTL0) with the REFON bit.

The DAC competes with two of the ADC channels for access to the pins of I/O Port 6. Unlike most peripheral controls on the MSP430, the DAC’s access to the pins is not controlled by the PxSEL register. Instead, the DAC is multiplexed with the ordinary port control and will drive the output if the DAC12AMPx bits are set to any value greater than zero. The DAC12AMPx bits in the control registers also determine the mode of the DAC’s operation.

The basic method of DAC operation is to load the DAC12_xDAT. Using the DAC12LSELx bits of the control register, the actual trigger for the output is set. The device can be figured to output whenever the data register is written to, whenever the data register is written and the DAC enable is set, or according to timers A or B. It is necessary to change the mode out of SEL mode 0 in order to use the interrupts with the DAC.

The DAC can be interrupt enabled via the DAC control register and the interrupt enable registers. The flag is set whenever a conversion is complete. Also, the DAC outputs can be grouped together to ensure that the output of both DACs appears simultaneously. When the units are grouped, both DAC12_xDAT registers must be written before the outputs will appear. The device does not check whether you have changed the value; updating with the same information will still work.