When overflow occurs, even otherwise stable filters may get stuck in a large-scale limit cycle, which is a short-period, almost full-scale persistent filter output caused by overflow.

Clearly, such behavior is intolerable and must be prevented. Saturation arithmetic has been proved to prevent zero-input limit cycles, which is one reason why all DSP microprocessors support this feature. In many applications, this is considered sufficient protection. Scaling to prevent overflow is another solution, if as well the inital state values are never initialized to limit-cycle-producing values. The normal-form structure also reduces the chance of overflow.

Small-scale limit cycles are caused by quantization. Consider the system Note that when α z 0 > z 0 - Δ B 2 α z 0 z 0 Δ B 2 , rounding will quantize the output to the current level (with zero input), so the output will remain at this level forever. Note that the maximum amplitude of this "small-scale limit cycle" is achieved when α z 0 = z 0 - Δ B 2=⇒= z max = Δ B 21-α α z 0 z 0 Δ B 2 ⇒ z max Δ B 2 1 α In a higher-order system, the small-scale limit cycles are oscillatory in nature. Any quantization scheme that never increases the magnitude of any quantized value prevents small-scale limit cycles. However, this introduces greater error and bias. Since the level of the limit cycles is proportional to Δ B Δ B , they can be reduced by increasing the number of bits. Poles close to the unit circle increase the magnitude and likelihood of small-scale limit cycles.