<?xml version="1.0" encoding="utf-8" standalone="no"?>
<!DOCTYPE document PUBLIC "-//CNX//DTD CNXML 0.5 plus MathML//EN" "http://cnx.rice.edu/cnxml/0.5/DTD/cnxml_mathml.dtd">
<document xmlns="http://cnx.rice.edu/cnxml" xmlns:md="http://cnx.rice.edu/mdml/0.4" xmlns:m="http://www.w3.org/1998/Math/MathML" xmlns:bib="http://bibtexml.sf.net/" id="Module.2004-05-17.2503">
  <name>Alternate FFT Structures</name>
  <metadata>
  <md:version>1.6</md:version>
  <md:created>2004/05/17 17:25:03 GMT-5</md:created>
  <md:revised>2006/09/10 21:05:19.594 GMT-5</md:revised>
  <md:authorlist>
      <md:author id="dljones">
      <md:firstname>Douglas</md:firstname>
      <md:othername>L.</md:othername>
      <md:surname>Jones</md:surname>
      <md:email>dl-jones@uiuc.edu</md:email>
    </md:author>
  </md:authorlist>

  <md:maintainerlist>
    <md:maintainer id="harika">
      <md:firstname>Harika</md:firstname>
      
      <md:surname>Basana</md:surname>
      <md:email>ilsai@rice.edu</md:email>
    </md:maintainer>
    <md:maintainer id="dljones">
      <md:firstname>Douglas</md:firstname>
      <md:othername>L.</md:othername>
      <md:surname>Jones</md:surname>
      <md:email>dl-jones@uiuc.edu</md:email>
    </md:maintainer>
    <md:maintainer id="kclarks">
      <md:firstname>Kyle</md:firstname>
      <md:othername>Evan</md:othername>
      <md:surname>Clarkson</md:surname>
      <md:email>kclarks@rice.edu</md:email>
    </md:maintainer>
  </md:maintainerlist>
  
  <md:keywordlist>
    <md:keyword>decimation in frequency</md:keyword>
    <md:keyword>decimation in time</md:keyword>
    <md:keyword>FFT</md:keyword>
    <md:keyword>FFT structures</md:keyword>
    <md:keyword>in-order FFT</md:keyword>
  </md:keywordlist>

  <md:abstract>FFT structures with different memory layout and interconnection patterns
are occasionally useful for certain applications.
These alternate structures include decimation-in-frequency FFTs with in-order
outputs, decimation-in-time FFTs with in-order inputs, structures with both
in-order inputs and outputs, and constant-geometry structures with the same
connection pattern in every stage.</md:abstract>
</metadata>

  <content>
    <para id="para1"><cnxn document="m12016">Bit-reversing</cnxn> the input in <cnxn document="m12016">decimation-in-time (DIT) FFTs</cnxn> or the output in
       <cnxn document="m12018">decimation-in-frequency (DIF)
       FFTs</cnxn> can sometimes be inconvenient or inefficient.
       For such situations, alternate FFT structures have been developed.
       Such structures involve the same mathematical computations as the
       standard algorithms, but alter the memory locations in which
       intermediate values are stored or the order of computation of the
       <cnxn document="m12016">FFT butterflies</cnxn>.
    </para>
    <para id="brdif">The structure in <cnxn target="fig:brdif"/> computes a
       <cnxn document="m12018">decimation-in-frequency FFT</cnxn>,
       but remaps the memory usage so that the <emphasis>input</emphasis>
       is <cnxn document="m12016">bit-reversed</cnxn>,
       and the output is in-order as in the conventional
       <cnxn document="m12016">decimation-in-time FFT</cnxn>.
       This alternate structure is still considered a DIF FFT because
       the <cnxn document="m12016">twiddle factors</cnxn> are applied as in the <cnxn document="m12018">DIF FFT</cnxn>.
       This structure is useful if for some reason the DIF
       butterfly is preferred but it is easier to bit-reverse
       the input.
    </para>
    <figure id="fig:brdif" orient="vertical">
	<media type="image/png" src="image1.png"/> 
	<caption><cnxn document="m12018">Decimation-in-frequency radix-2   FFT</cnxn> with bit-reversed
	<emphasis>input</emphasis>.
        This is an <cnxn document="m12016">in-place</cnxn> algorithm
        in which the same memory can be reused throughout the computation.</caption>
    </figure>
    <para id="brdit">
         There is a similar structure for the
         <cnxn document="m12016">decimation-in-time FFT</cnxn> with
         in-order inputs and bit-reversed frequencies.
         This structure can be useful for
         <cnxn document="m12022">fast convolution</cnxn> on machines
         that favor decimation-in-time algorithms because the
         filter can be stored in bit-reverse order, and then the inverse FFT
         returns an in-order result without ever bit-reversing any data.
         As discussed in <cnxn document="m12021">Efficient FFT Programming Tricks</cnxn>,
         this may save several percent of the execution time.
    </para>
    <para id="element-477">The structure in <cnxn target="fig:inplace"/> implements a
    <cnxn document="m12018">decimation-in-frequency FFT</cnxn>
    that has both input and output in order.
    It thus avoids the need for bit-reversing altogether.
    Unfortunately, it destroys the <cnxn document="m12016">in-place</cnxn> structure somewhat,
    making an FFT program more complicated and requiring more memory;
    on most machines the resulting cost exceeds the benefits.
    This structure can be computed in place if <emphasis>two</emphasis>
    butterflies are computed simultaneously.</para><figure id="fig:inplace"><media type="image/png" src="image2.png"/> 
	<caption>Decimation-in-frequency radix-2 FFT with in-order input and output. It can be computed in-place
	if two butterflies are computed simultaneously.</caption>
    </figure>
    <para id="element-7">The structure in <cnxn target="fig:constantgeometry"/> has a constant
    geometry; the connections between memory locations are identical in each
    <cnxn document="m12016">FFT stage</cnxn>.
    Since it is not in-place and requires bit-reversal, it is inconvenient for
    software implementation, but can be attractive for a highly parallel
    hardware implementation because the connections between stages can be
    hardwired.
    An analogous structure exists that has bit-reversed inputs and in-order
    outputs.</para><figure id="fig:constantgeometry"><media type="image/png" src="image3.png"/>
	<caption>This constant-geometry structure has the same interconnect
        pattern from stage to stage.
        This structure is sometimes useful for special hardware.</caption>
    </figure>
  </content>
  
</document>
