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FIR Filtering: Basic Assembly Exercise for TI TMS320C54x (中文版 Chinese Version)

Module by: Douglas L. Jones, Swaroop Appadwedula, Matthew Berry, Mark Haun, Jake Janovetz, Michael Kramer, Dima Moussa, Daniel Sachs, Brian Wade, Patrick Frantz, Kanglin Wang. E-mail the authors

Based on: FIR Filtering: Basic Assembly Exercise for TI TMS320C54x by Douglas L. Jones, Swaroop Appadwedula, Matthew Berry, Mark Haun, Jake Janovetz, Michael Kramer, Dima Moussa, Daniel Sachs, Brian Wade

Summary: You will work through a section of TI TMS320C54x assembly code by hand. The instructions include multiplication of fractional numbers in two's complement representation.

汇编练习

分析下面的程序代码。可以参考 Two's Complement and Fractional Arithmetic for 16-bit ProcessorsAddressing Modes for TI TMS320C54x、以及 Mnemonic Instruction Set [link] 等手册中的内容。


	
	1  FIR_len .set    3
	2
	3  ; Assume: 
	4  ;   BK = 3
	5  ;   AR0 = 1
	6  ;   AR2 = 1000h
	7  ;   AR3 = 1004h
	8  ;
	9  ;   FRCT = 1
	10
	11      stl     A,*AR3+%
	12      rptz    A,(FIR_len-1)
	13      mac     *AR2+0%,*AR3+0%,A
	
      

任何以";" 开头的代码行均为注释。在这里,注释行告诉你在第一个指令stl执行前辅助寄存器BKAR0AR2AR3中的内容。注意以 "h" 结尾或以 0x 开头的数字均为 十六进制 数值。

Example 1

1000h 和0x1000 均表示十进制数值4096。

假设起始地址为1000h的内存中的初始数据为:

Figure 1: 内存中的数据分配(执行前)
Figure 1 (reg1.png)

在熟悉了stlrptzmac 等指令后,逐行执行代码并将累加器 A 及辅助寄存器 AR2AR3 中的数值记录在Figure 2所提供的表格中。另外,在三行指令全部运行之后将内存中的数值记录在 Figure 3 所提供的表格中。

Figure 2: 执行结果
A AR2 AR3  
00 0000 8000h 1000h 1004h at start of code
      after stl instruction
      after rptz instruction
      after first mac instruction
      after second mac instruction
      after third mac instruction

在练习过程中要注意累加器 A 是40位寄存器,而且乘法器是工作在 分数算法模式(fractional arithmetic mode)下。在这种模式下,所有DSP中的整数都被当作分数来处理,ALU(运算器)中整数乘法器的运算结果都会被左移一位。(在没有特别指明的情况下,认为所有练习中的乘法器都是工作在分数算法模式下。)所以如果仅仅执行将两个整数相乘的操作,运算器(通过mac指令)所产生的结果将是实际值的两倍。DSP的数值表示及算法在Two's Complement and Fractional Arithmetic for 16-bit Processors中有更详细的描述。

Figure 3: 内存中的数据分配(执行前)
Figure 3 (reg2.png)

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