/* Compiler intrinsics for the TI compiler */ /* and the Very Portable Optimizer (VPO) port */ /* to TMS320C54X series DSPs */ /* */ /* Use compile option -DVPO when using VPO */ /* */ /* Copyright September 2005 by Matt Kleffner */ /* under the Creative Commons Attribution License */ #ifndef INTRINSICS_H #define INTRINSICS_H #ifdef VPO long int vpo_l_mul_ii(int w0, int w1); /* fractional multiply without fractional mode (long result) */ #define _l_mul_fract_fb0_ii(w0,w1) \ (vpo_l_mul_ii(w0,w1) << 1) /* fractional multiply with fractional mode already on (long result) */ #define _l_mul_fract_fb1_ii(w0,w1) \ (vpo_l_mul_ii(w0,w1)) /* fractional multiply without fractional mode (int result) */ #define _i_mul_fract_fb0_ii(w0,w1) \ (vpo_l_mul_ii(w0,w1) >> 15) /* fractional multiply with fractional mode already on (int result) */ #define _i_mul_fract_fb1_ii(w0,w1) \ (vpo_l_mul_ii(w0,w1) >> 16) #define _set_fract_bit() vpo_set_fract() #define _reset_fract_bit() vpo_reset_fract() #define _set_ovm_bit() vpo_set_ovm() #define _reset_ovm_bit() vpo_reset_ovm() #define _l_add_shiftl_li(w0,w1) (((int32)(w0))+(((int32)(int16)(w1))<<16) ) #define _l_sub_shiftl_li(w0,w1) (((int32)(w0))-(((int32)(int16)(w1))<<16) ) #else /* fractional multiply without fractional mode (long result) */ #define _l_mul_fract_fb0_ii(w0,w1) \ (((long int)w0 * (long int)w1) << 1) /* fractional multiply with fractional mode already on (long result) */ #define _l_mul_fract_fb1_ii(w0,w1) \ (((long int)w0 * (long int)w1)) /* fractional multiply without fractional mode (int result) */ #define _i_mul_fract_fb0_ii(w0,w1) \ (((long int)w0 * (long int)w1) >> 15) /* fractional multiply with fractional mode already on (int result) */ #define _i_mul_fract_fb1_ii(w0,w1) \ (((long int)w0 * (long int)w1) >> 16) #define _set_fract_bit() asm(" ssbx frct") #define _reset_fract_bit() asm(" rsbx frct") #define _set_ovm_bit() asm(" ssbx ovm") #define _reset_ovm_bit() asm(" rsbx ovm") #endif /* VPO */ #endif /* INTRINSICS_H */