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<document xmlns="http://cnx.rice.edu/cnxml" xmlns:md="http://cnx.rice.edu/mdml/0.4" xmlns:bib="http://bibtexml.sf.net/" id="Module.2004-02-25.5918">
  <name>2.2 - Structure of an Assembly Program</name>
  <metadata>
  <md:version>1.2</md:version>
  <md:created>2006/05/18 16:53:32 GMT-5</md:created>
  <md:revised>2006/05/19 12:52:53.790 GMT-5</md:revised>
  <md:authorlist>
      <md:author id="nanand">
      <md:firstname>Naren</md:firstname>
      
      <md:surname>Anand</md:surname>
      <md:email>nanand@rice.edu</md:email>
    </md:author>
  </md:authorlist>

  <md:maintainerlist>
    <md:maintainer id="nanand">
      <md:firstname>Naren</md:firstname>
      
      <md:surname>Anand</md:surname>
      <md:email>nanand@rice.edu</md:email>
    </md:maintainer>
  </md:maintainerlist>
  
  <md:keywordlist>
    <md:keyword>assembly</md:keyword>
    <md:keyword>control flow</md:keyword>
    <md:keyword>ez430</md:keyword>
    <md:keyword>MSP architecture</md:keyword>
  </md:keywordlist>

  <md:abstract>Explains the structure of an assembly language program.</md:abstract>
</metadata>

  <content>
<para id="assem1">The assembly program begins execution at the reset interrupt.  The reset interrupt is the first thing that occurs when power is given to the processor.  By default in the Workbench files, the reset interrupt is loaded to send the execution of the program to the start of the written code.  Until a branch is reached, the processor will execute each instruction in turn.  If the program does not loop back to an earlier point to keep going, eventually the execution will reach the end of the valid instructions in memory and attempt to execute the "instructions" in the following memory addresses (which are invalid and possibly gibberish). You should never let this happen.
</para>

<para id="assem2">The control of a programs execution is called <term>control flow</term>, and it is accomplished through branching, jumping, function calls, and interrupts.  Interrupts are the subject of future labs.  Branching and jumping refer to changing the next instruction from the next one sequentially to an instruction elsewhere in the program.  By branching to an instruction above the branch itself you can cause the program to repeat itself.  This is a basic loop in assembly.  Branches can also be conditional. In the MSP architecture conditional branches are generally dependent on the status register (SR) bits to decide whether to execute the next instruction after the branch or the instruction the branch specifies.  Many arithmetic and logical operations can set the relevant bits in the status register; check the ez430's User’s Guide for which ones you will need.  A full description of each of the Assembly instructions for the ez430 can be found in <term>Section 3.4</term>. 
</para>

<para id="element-385">To store values to perform operations, you must use the ez430's registers to store values.  The ez430 has 16 CPU registers. Of these 16, the upper 12 are general purpose 16 bit registers (R4-R15).  The lower four are:
<list id="registers" type="bulleted">
<item>R0  Program Counter(PC) – This register controls the next instruction to be executed by the MSP core. In general, this register is incremented automatically during execution. It can be used as a source in operations normally. </item>
<item>R1 Stack pointer (SP) – The stack pointer is used to keep track of previous execution modes and to return from interrupts. Can be read as a normal register. </item>
<item>R2 Status Register (SR) – The status register can be written to change the operating mode of the MSP as specified in the User’s Guide. When read it can act as a constant generator. Depending on the instruction code options this register will be read as: a normal register, 0x0000, 0x0004, or 0x0008 depending on the As bits.  </item>
<item>R3 Constant Generator II – This register cannot be written to, and when read produces:
0x0000, 0x0001, 0x0002, or 0xffff depending on the As bits.</item>
</list>
The rest of the registers on the ez430 behave as if they were memory.  In most cases, these special purpose registers can be read and written to normally but they affect the behavior of their respective systems.  
</para>

<para id="assem3">Once you understand the basics of assembly you should be able to write some simple routines. 
Once you create a new Assembly project in Workbench, replace the default code with the following.  You'll see that the Watchdog timer has already been deactivated.  Put your assembly code in the place indicated.  Also, notice the difference in location of instructions and <term>labels</term>.  Labels, which mark the begining of certain blocks of code, are left aligned such as the "RESET" seen below.  Instructions, however, are tabbed over.  Remember to follow this convention because the compiler will assume anything left aligned is a label.

<code type="block"><![CDATA[#include "msp430x20x1.h"

;-------------------------------------------------------------------------------
            ORG     0xF800                  ; Begining PsuedoOP
;-------------------------------------------------------------------------------
RESET       mov.w   #0x280,SP               ; Set stackpointer
            mov.w   #WDTPW+WDTHOLD,&WDTCTL  ; Stop watchdog timer       

;;    **YOUR CODE GOES HERE**
        
        
;-------------------------------------------------------------------------------
;           Interrupt Vectors
;-------------------------------------------------------------------------------
            ORG     0xFFFE                  ; MSP430 RESET Vector
            DW      RESET                   ;
            END  
]]></code></para>

  </content>
  
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