Based on: FIR Filtering: Basic Assembly Exercise for TI TMS320C54x by Douglas L. Jones, Swaroop Appadwedula, Matthew Berry, Mark Haun, Jake Janovetz, Michael Kramer, Dima Moussa, Daniel Sachs, Brian Wade, Jason Laska
Summary: You will work through a section of TI TMS320C55x assembly code by hand. The instructions include multiplication of fractional numbers in two's complement representation.
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Analyze the following lines of code. Refer to Two's Complement and Fractional Arithmetic for 16-bit Processors, Addressing Modes for TI TMS320C55x, and the Mnemonic Instruction Set [link] manual for help.
1 FIR_len .set 3
2
3 ; Assume:
4 ; BK03 = FIR_len
5 ;
6 ; AR2 = 1000h
7 ; AR3 = 1004h
8 ; FRCT = 1
9
10 BSET AR2LC ; sets circular addressing for AR2
11 BSET AR3LC ; sets circular addressing for AR3
12
13 mov LO(AC0),*AR3+
14 mov #0, AC0
15 rpt (FIR_len-1)
16 macm *AR2+,*AR3+,AC0
Anything following a ";" is considered a comment.
In this case, the comments indicate the contents of the
auxiliary registers, the BK03 register, and the address registers before the execution of
the first instruction, mov.
The line FIR_len .set 3 defines the name FIR_len as equal to 3. The BK03 register contains the length of the
circular buffer we want to use for auxiliary register 0 through 3. The BSET AR2LC modifies the increment operator + so that it
behaves as a circular buffer. This means that the address registers will be incremented until the
(memory-address mod value-in-BK03) = 0.
Note that any number
followed by an "h" or preceded with a
0x represents a hexadecimal value.
1000h and 0x1000 both refer to the decimal number 4096.
Assume that the data memory is initialized as follows starting
at location 1000h.
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After familiarizing yourself with the mov,
rpt, and macm instructions, step
through each line of code and record the values of the
accumulator AC0 and auxiliary registers
AR2 and AR3 in the spaces provided
in Figure 2. Additionally, record the value
of the memory contents after all three instructions have been
"executed" in the blank data memory table provided in Figure 3.
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When working through the exercise, take into account that the
accumulator AC0 is a 40-bit register, and that the
multiplier is in the fractional arithmetic mode.
In this mode, integers on the DSP are interpreted as
fractions, and the multiplier will treat them accordingly.
This is done by shifting the result of the integer multiplier
in the ALU left one bit. (All the arithmetic is fractional in these examples.)
Multiplies performed by the ALU
(via the macm instruction) produce a result that
is twice what you would expect if you just multiplied the two
integers together. DSP numerical representation and
arithmetic are described further in Two's Complement and Fractional Arithmetic
for 16-bit Processors.
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