Inside Collection (Course): Lectures on Analog Electronics

Summary: This gives problems on diffusion capacitances and junction capacitances.

Tutorial 3_supplementary_AE Lecture No.3.

Problems on parasitic capacitances associated with Diode at high frequencies.

Problem 1.Given a diode under reverse bias with a depletion width 4µm.

- If cross sectional area is 1mm square, determine C
_{jD}given

Absolute permittivity ε_{0} = 8.854×10^{-12}F/m and relative permittivity or dielectric constant (k) = ε_{r}= 11.6 [Answer: 26pF]

- If C
_{jD}= 15pF then determine the cross sectional area. [Ans.0.6 mm^{2}]

Problem 2. A diode is under forward bias condition at V_{D} = 0.7V. Reverse Saturation current I_{S}=16nA at 300K. Minority carrier life time are τ_{n} = τ_{p} = 25µsec.

- Find C
_{d}= diffusion capacitance ; [1/(r_{d}C_{d}) = 1/ τ_{n}+1/ τ_{p}; [Answer 5.74µF] - Find V
_{D}which gives C_{d}= 10µF; [Answer V_{D }= 0.729V]

Problem 3. A silicon PN junction has doping concentrations N_{A}= 10^{19}/cc & N_{D}= 10^{15}/cc. Cross sectional area A= 0.001cm^{2}. Since it is one sided step junction major role is played by holes injected in N-type region. Hence the life-time of holes is given τ_{p}(P region)= 0.3µsec.

Under forward bias condition of V_{D} = 0.6V , determine:

- Diffusion Capacitance C
_{d}; - Transition or Junction Capacitance C
_{jD};

Solution: Here I_{D} is not given nor the saturation current I_{S} is given. We can use the doping to find either of the two.

I_{D} = Q_{p}/τ_{p} and

Q_{p}= charge stored in N region under forward biased condition =

q{p_{n}(0)-p_{n}(thermal equilibrium)}L_{p}A;

and L_{p}=√(D_{p}τ_{p}) and D_{p} = µ×V_{T} = 450 cm^{2}/(V-sec)×26mV= 11.7 cm^{2}/sec;

Therefore L_{p}= 1.94×10^{-3} cm.

Therefore I_{D}= q{p_{n}(0)-p_{n}(thermal equilibrium)}L_{p}A/τ_{p} = 2.453mA;

Therefore r_{d} = 26mV/2.453mA =10.59 Ω.

r_{d}×C_{d}= τ_{p} therefore C_{d} =28,000pF.

Calculation of C_{jD}:

C_{jD}= εA/d_{n }where d_{n} = the depletion width on N-side = √(qεN_{D}/2)√(ø_{B0}-V_{F});

In a one sided step junction d~ d_{n} ( depletion width on the lightly doped side);

Therefore C_{jD}= εA/[√(qεN_{D}/2)√(ø_{B0}-V_{F})] = √(2ε/(qN_{D}))×(1/√( ø_{B0}-V_{F}));

ø_{B0 }= Built in barrier potential under zero bias condition= V_{T}ln(N_{A}N_{D}/n_{i}^{2})=817.056mV;

Therefore C_{jD}= 19.8 pF.

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