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AE_Lecture8_PartB_Incremental Model of FET

Module by: Bijay_Kumar Sharma. E-mail the author

Summary: AE_Lecture8_PartB describes the dynamic characteristics of FET. It models it as Voltage Controlled Current Source. The Figure of Merit is defined.

AE_Lecture8_Incremental Model of FET.

FET behaves as Voltage Controlled Current Source. Hence its model is as given in Figure 1.

Figure 1
Figure 1 (Picture 7.png)

At low frequencies Capacitances can be considered to be open circuit. And the Incremental Model at low Frequencies will have infinite impedance as shown in Figure 2.

Figure 2
Figure 2 (Picture 8.png)

At low frequencies, input current is zero and short circuit current gain is INFINITY. But at high frequencies gate to source Capacitance due to overlap Capacitance ( overlap between source and gate) and Gate Oxide Capacitance and gate to drain Capacitance again due to overlap Capacitance ( overlap between drain and gate) and Gate Oxide Capacitance draw considerable currents. Hence Short Circuit Current Gain is finite and falls at the rate of 20dB/decade.

In the low frequency model, we have transconductance (gm) and output impedance of the current source (rds).

Derivation of Transconductance.

Figure 3
Figure 3 (graphics1.png)
=
Figure 4
Figure 4 (graphics2.png)
_____(1)

Figure 5
Figure 5 (graphics3.png)
Figure 6
Figure 6 (graphics4.png)
Figure 7
Figure 7 (graphics5.png)

Figure 8
Figure 8 (graphics6.png)
1.

Due to channel length modulation the family of curves are not horizontal but have a finite slope.as shown in Figure 3. To account for this ,channel-length modulation parameter λ is introduced.

Figure 9
Figure 9 (Picture 6.png)

In long channel NMOS(with channel length of 10µm) of bygone MSI(Medium Scale Integration) and LSI(Large Scale Integration) era, the slope was minimal. But as packing density increased to 40 million transistors, lateral scaling reduced the channel length to 100nm. In short channel NMOS channel length modulation is very pronounced as seen in Figure 3.

Figure 10
Figure 10 (graphics7.png)

Figure 11
Figure 11 (graphics8.png)

Figure 12
Figure 12 (graphics9.png)
=
Figure 13
Figure 13 (graphics10.png)

We know that

Figure 14
Figure 14 (graphics11.png)

Figure 15
Figure 15 (graphics12.png)
=
Figure 16
Figure 16 (graphics13.png)
2.

Amlification Factor=µ= gm×r0 = the maximum gain which can be achieved from a Common Source or Common Emitter Amplifier.

Combining Eq 1 and Eq 2 we get the following:

Amplification Factor of CS MOS Amplifier=[

Figure 17
Figure 17 (graphics14.png)
]

Amplification Factor of CE BJT Amplifier=[

Figure 18
Figure 18 (graphics15.png)

VA is the Early Voltage which was discussed in Lecture 3 in connection with the Static Output characteristics of CE BJT.

As seen above the amplification factor of CE BJT is independent of Quiescent Collector Current. From the Table we see that it is only 3400. But my research on CE BJT is showing that a much larger gain can be realized.

In the following Table we make a comparative study of BJT and FET.

Table 1
FET BJT
Geometry dependent parameters graphics16.png Geometry independent parameters
µ(amplification factor varies inversely with ID) µ(amplification factor is independent of ID)
VDS=10V,Kn=1graphics17.png ,λ=0.0133 V-1 βo =100,VA=75V,VCE=10V
gm=graphics18.png gm=graphics19.png
Small signal approximation holds good for values:graphics20.pnggraphics21.pnggraphics22.png Small signal approximation holds good for values:graphics23.pnggraphics24.pnggraphics25.png
Much higher packing density because no isolation diffusion required. Here isolation diffusion is required hence historically it is one generation behind as far as packing density is concerned
This is slower. The best clocking speed is 3GHz BJT is historically much faster . The state of art in BJT is achieving 300GHz transit frequency.
Noise Figure is much better. This has no SHOT noise , no PARTITION noise. It has flicker noise. For Low Noise Amplifier cryogenically cooled MESFET. Noise Figure is poorer because of SHOT noise, PARTITION noise and THERMAL noise.
Table 2
ID(µA) gm(×10-3 S) rds(MΩ) µ IC(µA) gm(×10-3 S) rπ(kΩ) r0(MΩ) µ
1 0.0476 85.2 4060 1 0.04 2500 85 3400
10 0.151 8.52 1280 10 0.4 250 8.5 3400
100 0.476 0.852 406 100 4 25 0.85 3400
1000 1.51 0.085 128 1000 40 2.5 0.085 3400
10,000 4.76 0.0085 40 10,000 400 0.25 0.0085 3400

HIGH FREQUENCY MODEL OF FET

In Figure 4, high frequency model of MOSFET is set up for calculating the short circuit current. We follow the same procedure as we followed in CE BJT.

Figure 19
Figure 19 (Picture 1.png)

There are various values for Cgs and Cgd in Triode Region, in Pentode Region and in Cut-off Region. In Analog Electronics for linear applications we are concerned only with Pentode Region. So we will consider the two capacitances in Pentode or in Saturation Region.

CGS = (2/3) CGC + CGSO.W

CGD = CGDO.W

Where CGC = COX.WL and COX = (ε0. εoxide)/Doxide F/cm2;

CGSO = overlap capacitance between Gate and Source;

CGDO= overlap capacitance between Gate and Drain;

Since rds is shorted therefore :

I2(jω) + Id(jω) = gm . Vgs(jω) 3

Vgs(jω) = Ig(jω)/(jω(CGS+ CGD) 4

From Eq3 and Eq4:

Figure 20
Figure 20 (graphics26.png)
5

Eq 5 can be rewritten as :

Figure 21
Figure 21 (graphics27.png)
6

Where ωT = gm/( CGS+ CGD) = Unity Gain BW or Gain×BW or Gain BW Product(GBP);

And ω* = gm/CGD and β(jω) falls at 20dB per decade.

Through proper substitutions in GBP expression we get :

Figure 22
Figure 22 (graphics28.png)
Figure 23
Figure 23 (graphics29.png)

A reduction in channel length by a factor of 10 increases fT by 100.

In BJT GBP < 1/(rxCµ)

BODY EFFECT or SUBSTRATE SENSITIVITY

Figure 24
Figure 24 (Picture 2.png)

Figure 25
Figure 25 (Picture 3.png)

Figure 26
Figure 26 (graphics30.png)
Figure 27
Figure 27 (Picture 4.png)
Figure 28
Figure 28 (graphics31.png)
Figure 29
Figure 29 (graphics32.png)

Where

Figure 30
Figure 30 (graphics33.png)

Figure 31
Figure 31 (graphics34.png)
=Body Effect parameter
Figure 32
Figure 32 (graphics35.png)

Figure 33
Figure 33 (graphics36.png)
(V)

Typical Values are :-

Figure 34
Figure 34 (graphics37.png)

Figure 35
Figure 35 (graphics38.png)
3
Figure 36
Figure 36 (graphics39.png)

Figure 37
Figure 37 (graphics40.png)

Figure 38
Figure 38 (Picture 5.png)

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