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AE_Tutorial 11_Power Amplifiers

Module by: Bijay_Kumar Sharma. E-mail the author

Summary: AE_ Tutorial_11 gives problems on Power Amplifiers discussed in AE_Lecture 10.

AE_Tutorial 11_Power Amplifiers(Audio)

Problems have been taken from Microelectronic Circuits_Analysis & Design by Rashid, Publisher Thomson(Indian Edition),1999.Chapter 14_Power Amplifiers.

Problem 1. Design of a transformer coupled Class A Amplifier.

Figure 1
Figure 1 (Picture 1.png)

Refer to Figure 1.Design a Transformer-coupled Class A CE Amplifier to give an output power of PL = 10W at a load resistance of 4Ω speaker. Assume DC bias of VCC =12V. The BJT has short circuit dc as well as incremental current gain of 100.

Solution.

Step 1. Maximum Voltage Swing = VCE(max) = 2VCC = 24 V;

Step 2. Whatever power is dissipated by BJT under no signal, half of it at most will be transferred to the load under full signal condition.

Therefore Collector Power Dissipation under no signal condition is PC = 2 PL = 20W= ICQ× VCC= ICQ×12

Therefore ICQ = 20/12 = 1.67A;

In Figure 12 in AE_Lecture 10_Part2, the load line graphical interpretation of Class A amplifier is given.

The slope of the dynamic load line is = -(1/RL’) = -( ICQ/ VCC);

Therefore RL’ = 12/1.67 = 7.19Ω;

Step 3. RL’ = n2 × RL = n2×4Ω where n = turns ratio = primary coil no. of turns/ secondary coli number of turns;

Therefore n = √(7.19/4) =1.34;

Step 4. Peak Collector Current = 2ICQ = 3.34A;

Step 5. The quiescent base current = ICQ/βF = 1.67/100 A =16.7mA;

The biasing network has to be designed to achieve the above quiescent point (1.67A, 12V).

Problem2. Finding the efficiency and power dissipation of a complementary push-pull amplifier.

Figure 2
Figure 2 (Picture 2.png)

Refer to Figure 2 .

  1. (a) Calculate the efficiency and power dissipation of each transistor in the complementary push-pull output stage if VCC = +12V and VEE =-12V and RL = 50Ω. The parameters of the transistors are: βf0 = βF = 100, VCE(sat)=0.2V and VBE(on)=0.72V.
  2. (b) Use Orcad simulation to plot the transfer characteristic.

Solution.

Peak load voltage in positive half is = VP =VCC – VCE(sat)= (12-0.2)= 11.8V;

Similarly negative peak voltage = -11.8 V.

Positive peak current = magnitude of negative peak current = VP /RL = 11.8/50 = 0.236A

Under signal condition average current drawn from one battery = IP/π since each battery supplies half wave rectified current. Hence power supplied by one battery is = (IP/π)×VCC;

Power supplied by two batteries = PS = 2(IP/π)×VCC = (2× 0.236×12)/π = 1.803W;

Output power across the load = PL = (IP/√2)× (VP/√2) = 1.392W;

Power conversion efficiency = 1.392/1.803= 77.2%;

Power dissipation in each transistor is = (PS - PL )/2 = 206mW.

Problem 3.Design a transformer- coupled Class B Amplifier.

Refer to Figure 3.

Figure 3
Figure 3 (Picture 3.png)
Design a transformer-coupled Class B push-pull amplifier to supply a maximum output power of PL(max) =10W at a load resistance of RL = 4Ω. Assume a DC supply of 15V and current gain 100 and VBE(ON)=0.7V.

Solution:

Figure 4
Figure 4 (Picture 4.png)

Step1

Maximum voltage swing across either of BJTs =VCE(max)=2VCC = 30V;

Step 2 Effective load resistance as seen by the primary side is RL’ = n2RL.

PL(max) = VCC2/(2 RL’) ↔ this is because there is a sinusoidal voltage swing across the reflected load RL’ of amplitude VCC.

Therefore RL’ = VCC2/(2 PL(max) ) = 152/(2×10) = 11.25Ω;

Ste 3. Calculation of Peak collector current:

IC(peak) = VCC/RL’ = 15/11.25 =1.33A;

Step 3. Average Current supplied by each transistor.

Each transistor supplies half wave rectified current.

Hence IC (average) = IC(peak)/π = 1.33/3.14= 0.424A;

Total average current supplied by the battery= 2 IC (average)=0.848A;

Step 4. DC Power from the battery = VCC ×2 IC (average) =15×0.848 = 12.72W;

Step 5. Average Collector Power Dissipation for both transistors is given by :

2PC = PDC – PL = [(2VC(peak)/π)÷ RL’]× VCC - VC(peak)2/(2 RL’);

Under Maximum Collector Power dissipation condition, VC(peak) is not VCC but 2VCC /π

And IC(peak) = 2VCC /(π RL’); Detailed analysis is given in Rashid’s book.

Therefore 2PC (max) = PDC (max)– PL (max)= [(2×(2VCC/π))(1/π)÷ RL’] × VCC – (2VCC /π )2/(2 RL’)

= 4 VCC2/(π2 RL’) - 2VCC2/(π2 RL’) = 2VCC2/(π2 RL’)=(2/π2)×2(VCC2/(2 RL’)=(4/π2) PL(max);

Therefore PC (max) = (2/π2) PL(max) = (2/π2)×10 = 2W;

Step 6. Required turns ratio: RL’ = n2× RL;

Therefore n =√( RL’/ RL) = √(11.25/4) =1.68.

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