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Digital Logic Worked Example: Transistor Level Circuit Analysis

Module by: Kai He, Jiwon Choe, Aniruddha Sen. E-mail the authorsEdited By: Elec and Comp 326

Exercise 1

Figure 1
Figure 1 (graphics1.png)
Write a truth table for the transistor level gate along with its Sum of Products Boolean equation that performs the same function performed by the gate. The truth table should have 4 inputs: A,B,C,and D.

Solution

Table 1: Truth Table
A B C D Y
0 0 0 0 1
0 0 0 1 0
0 0 1 0 0
0 0 1 1 0
0 1 0 0 1
0 1 0 1 0
0 1 1 0 0
0 1 1 1 0
1 0 0 0 1
1 0 0 1 0
1 0 1 0 0
1 0 1 1 0
1 1 0 0 0
1 1 0 1 0
1 1 1 0 0
1 1 1 1 0
Table 2: Karnaugh Map
Boolean Equation: Y = B’C’D’ + A’C’D’ = C’D’(A’ + B’)
Y   A A    
  1 1 0 1  
C 0 0 0 0  
C 0 0 0 0 D
  0 0 0 0 D
      B B  
PMOS transistors pass 1’s when the inputs are 0’s and NMOS transistors pass 0’s when inputs are 1’s. Therefore, when constructing the truth table, we look at parallel and series combinations of the NMOs and PMOS transistors to determine whether a 1 or 0 is being passed. After the truth table, we construct our Karnaugh map and find a minimum Sum of Products equation.

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