• The MSP430 has a larger assembly instruction set than the LC-3

  • MSP430 assembly includes some task specific instructions (Such as inc and dec) to simplify reading the language
  • Some MSP430 assembly instructions are interpreted instructions (Such as pop and push)

    Definition 1: Interpreted Instructions

    An instruction that is decomposed by the assembler into several smaller/ more basic fundamental instructions.

    Example

    pop R3 contains two implicit instructions: mov @SP, R3 and add #0x02, SP

• Math and logical instructions are similar, but do not have a specific destination.

  • MSP430 instructions come in two flavors, dual operand and single operand. Neither type has an explicit destination register, rather, the last operand serves as the destination too.
  • For Example: add R4, R5 in MSP430 assembly corresponds to add R5, R4, R5 in LC-3

  • Warning:

    Be careful to not overwrite data you wish to keep! If you need to preserve the values in both operand registers, you will need to save one of them first using a mov instruction.

• MSP430 Supports some byte as well as word instructions

  • Some MSP430 instructions allow you to address and write/read from a specific 8 bit byte in memory instead of the entire 16 bit word. The MSP430 memory has byte level addressability, but word instructions only operate on even numbered memory addresses (implicitly modifying the next odd numbered memory byte too). In many cases, especially when working with memory mapped I/O registers, you may need to operate on one specific byte only. To do so, just add a .b onto the end of the assembly instruction
  • For example: mov.b #0, &P1DIR sets 8 bit length P1DIR register to zero without accidentally modifying the registers around it.

  • Aside:

    MSP430 assembly specifies .w for executing word length instructions as well as .b for bit length instructions. The assembler by default assumes word length, so you the programmer don't have to explicitly write mov.w R5, R14 although you should be conscious that mov R5, R14 means the same thing.

• The MSP430 has 16 CPU registers

  • The MSP430 has twice as many CPU registers as the LC-3. Like in the LC-3 though, some of the MSP430's registers are reserved for the MSP430 runtime environment. Registers R0-R3 are reserved (Program Counter, Stack Pointer, Status Register, and a Constant Generation Register respectively), leaving registers R4 through R15 available for general purpose use as defined by the programmer.
  • In your assembly programs you have 12 general purpose registers at your disposal, but you also must manage and keep track of the additional options.

• Indirect, relative, and absolute addressing occurs differently

  • Instead of different indirect and direct load and store instructions (LD, LEA, LDI, etc...), the MSP430 uses one versatile mov instruction with different operand addressing modes.
  • mov can both read and write from memory-- it acts like both a load and store. (mov R4, &0x0200 corresponds to a ST while mov &0x0200, R4 corresponds to a LD)
  • Indirect references occur using different operation syntax.
    • Direct register access: Rn (where n is the number of a general purpose register) Example: R4 refers directly to R4
    • Immediate Values: #x (where X is an immediate numerical value or label) Example: #02h refers to the literal hex number 2
    • Indirect Access From a Register: @Rn (where n is the number of a general purpose register) Example: @R6 refers indirectly to the data stored in the memory location in R6
    • Indirect Offset Access: x(Rn) (where n is the number of a general purpose register and x is either an literal offset or a label) Example: 0(R7) refers to the data stored in the location in memory pointed to by R7

      Note:

      This has the same end result as @R7. By TI code convention though, @Rn cannot be used to specify the destination of an operation, so if you wish to store a result indirectly, you must use the 0(Rn) syntax.

      Tip:

      In this example R7 essentially contained the address while the literal offset was a small number. Offset Access can be very powerful when looked at the other way: where the literal contains a starting location in memory (potentially a label) and the register contains a small offset value incremented to access a series of locations in memory.
  • You can also perform indirect or relative operand addressing with operations other than loads and stores

    Example 1

    add @R4, R5 takes the data stored in the address pointed to by R4 and adds it with R5, storing the result in R5.

  • For more information, see the summary chart Figure 1 or the comprehensive MSP430 users guide section 3.3.0 through 3.3.7

• The MSP430 has two types of memory

  • The MSP430 has both traditional RAM and non-volatile Flash memory. On a power reset, all values in RAM are cleared, so your program will be stored in Flash. Flash is comparatively slow to write though, so it essentially cannot be written during run-time. Your program must store any temporary values to RAM memory, although it can read any preset constants from flash
  • Important Memory Locations:
    • 0x0200 : The Lowest Address in RAM
    • 0x0280 : The Highest Address in RAM
    • 0xF800 : The Beginning of Flash Memory
    • 0xFFE0 : The Beginning of the Interrupt Vector Table

Philosophy

• The MSP430 uses GPIO pins that are assignable to several functions depending on your specific model. Our version, the MSP430G2231 can have the pins act as digital output, digital input, or ADC input.
• The pins are organized into ports, with each port usually one byte (8 bits/pins) wide. On larger versions of the processor you can encounter several ports, but in this lab you will only be using P1
• You can set each pin's function independently (input or output). Since we want to do both, we will divide P1 into half inputs and half outputs as needed.

Usage

• The I/O ports are memory mapped into the top of the MSP430 address space.
• There are several registers associated with each port. For now, you only need to worry about four (P1IN, P1OUT, P1DIR, and P1REN).

  P1IN

  • The P1IN register is located at address 0x0020 in memory, which you can also refer to using the C symbol &P1IN
  • The register holds the values the MSP430 sees at each pin, regardless of the pin direction setting.
  • To read the register, use a mov.b instruction to avoid accidentally reading adjacent registers

  • Tip:

    If you are looking to test or read just the pins set to input, you will have to mask the P1IN register to zero out the other unwanted/output pins.

  P1OUT

  • The P1OUT register is located at address 0x0021 in memory, which you can also refer to using the C symbol &P1OUT
  • If their direction bits in P1DIR are set to output/ "1", the corresponding pins will output the values set in P1OUT.
  • If a pin's direction bits are set to input in P1DIR and its resistors are enabled in P1REN, P1OUT controls the pin's connection to the pull-up resistor. Setting P1OUT to "1" enables the pull-up, while setting it to "0" leaves the input to float in a high impedance state.
  • To set P1OUT, use a mov.b instruction to set several pins at once. To set individual bits to "1", you can use an or.b instruction with a "1" in the positions you want to set. To clear individual bits/ set them to zero, use an and.b instruction with mostly "1"s except for a "0" for the bits you want to clear.

  P1DIR

  • The P1DIR register is located at address 0x0022 in memory, which you can also refer to using the C symbol &P1DIR
  • The value of the bits in P1DIR determines whether the MSP430 hardware leaves the pin in a high impedance state where it responds to external voltage changes (which you can read at P1IN), or in a low impedance state where the MSP430 drives the output voltage to a certain value determined by P1OUT.
  • To set the bit directions all at once, use a mov.b instruction, but to change individual bits regardless of the others, use an and.b or an or.b
  • Set the corresponding bits to "0" to set pins to input mode, or to "1" to set them to output mode.

  P1REN

  • The P1REN register is located at address 0x0027 in memory, which you can also refer to using the C symbol &P1REN
  • P1REN controls whether the MSP430 Launchpad enables the integrated pull-up resistor for a given pin.
  • The pull-up resistors allow the use of single pole switches. They prevent the input signals from floating randomly while the switches are open by loosely tying the inputs to Vcc. When the switch is closed though, the much stronger connection to ground wins out, pulling the inputs down to GND.
  • Set the corresponding bits to "1" to enable a pin's pull-up resistor, or to "0" to disable it (disabled by default).

Philosophy

• A traditional single threaded polling scheme consists of a main loop that runs continuously. Within that loop, the processor periodically checks for changes, and if there are none, continues looping. Once a change is detected, the program moves to a new section of code or calls a new subroutine to deal with the changes.
• Polling has advantages and disadvantages-- it keeps program execution linear and is very easy to code and implement, but it also is not incredibly responsive. Since polling only checks values at certain points in the main run loop, if the loop is long or changes occur quickly, a polling scheme can miss input data. For now though it will suffice.